Technology & Research
Architecture & Silicon
Platform Technology
Eco-Technology Innovation
Research
Standards & Initiatives


Theme Descriptions - Research at Intel Day 2007

 
 
 
 
 
This year's event will feature demonstrations of the following research projects:
 
 
 Energy Efficiency
Bright Green: Sustainable Living as a Lens for Technological Innovation
We report on a qualitative study of 35 green households whose occupants have made significant changes to their homes and behaviors in order to be more environmentally responsible.
Datacenter Power and Thermals Management Prototype
The Datacenter Power and Thermals (DCPT) prototype demonstrates group-level power management of servers in a data center including real-time power monitoring and management. The primary benefits are reduced power and cooling requirements, scalable management, and reduced total cost of ownership.
 
 
Related Links
 
 
Useful Links
 
 
Energy-Efficient Power Delivery to the Data Center
Today's data centers are major consumers of power and increasing in the future. Intel has been researching power efficiencies in all areas of the data center from silicon to power delivery including power conversion. This demonstration shows the results of power savings through reduced power conversions.

Energy-Efficient Communications
Energy-efficient communication maximizes the battery life of a mobile platform by minimizing the energy consumption of the wireless communication device on the platform. Our goal is to design a wireless device that can turn on and off its power intelligently to minimize the energy consumption without sacrificing performance.

Scalable I/O with Record Energy Efficiency
Future platforms will have tens to hundreds of cores sharing connections to memory, other sockets, and peripherals. To feed all these cores and enable data-intensive emerging applications, I/O bandwidth must scale to >100 Gbps, meaning each channel must be >10 Gbps. Specific Challenge: Scaling the speed of I/O channels across industry-standard boards requires increasingly sophisticated circuits that have increasingly significant power consumptions. As with microprocessors, managing power is essential to performance. We are disclosing: I/O circuits consuming <14 percent of today's 5 Gbps PCIe* channels and <40 percent of the power of the best R&D alternative at 10 Gbps. These circuits can also tune from 5 Gbps @14 mW to 15 Gbps @75 mW, providing the ability to throttle power vs. performance.

 
 
Exploratory Research
 
MashMaker—Mashups for the Masses
MashMaker is a tool that makes it easy for normal users to combine information from multiple Web sites, in the form of mashups. MashMaker allows users to find useful information by browsing and following links, without having to plan what they want in advance or write programs.

Interactive Search Assisted Decision Support for Medicine (ISADS)
The goal of ISADS is to enable doctors to make more informed decisions about a given case by providing a selection of similar annotated cases from a large data repository. The fundamental challenge in developing ISADS systems is the identification of similar cases, not simply in terms of superficial image characteristics, but in a medically-relevant sense. ISADS is a collaborative research effort with Intel, Carnegie Mellon University, Georgia Institute of Technology, University of Pittsburgh and the University of Pittsburgh Medical Center.

Dynamic Physical Rendering
The Dynamic Physical Rendering Project is working towards a "material" that can change its shape under software control. This material, which would be composed of millions of tiny robot modules, could then be used to mimic arbitrary objects and 3-D scenes. Applications could include tangible, interactive 3-D visualization; new forms of user interface; and smart antennas. This presentation will illustrate our vision for creating these modules and the software needed to operate them, and show recent hardware prototypes we have developed at the 5 cm scale.

Fair Online Gaming
The Fair Online Gaming demonstration shows Intel platform security technology that can detect cheaters in multiplayer PC online games. In this demonstration, participants can play a real game where they can cheat and be caught by Intel hardware!

Intelligent Grid Management (IGM)
Computer grids are complex systems, whose behavior is governed by hundreds of manually-tuned parameters. As the complexity of these systems grows, automating the parameter-tuning procedure becomes indispensable. This project's goal is to take advantage of recent advances in machine learning to conceal complexities and improve the performance of computer grids.

Transistors as Biosensors: Applying Intel's Advanced Technologies to Address Biomedical Challenges
The Integrated Biosystems Lab (IBL) is leveraging Intel's strengths in silicon innovation, microelectronics, and precision manufacturing to address challenges in the biomedical field. The goal is to develop new capabilities in sensor technologies, and find new uses for Intel's advanced technology to create innovative systems and devices for clinical, industrial, and biomedical applications.

Intel® BioElectronic Chip: BioElectronic Label-free Sensor for Biomarker Detection in Medical Diagnostics
Intel research Israel lab is developing a BioElectronic sensor designed to enable Point of Care (PoC) diagnostics as well as for small- to large-scale laboratory testing. Using a simplified Field Effect Device (FED) modified by biological molecules, an electronic signal is facilitated upon detecting specific biomarkers (analyte). This device has the potential of multiplexed detection, providing a diagnostic profile that will revolutionize medical care as we know it today.

Runtime Kernel Rootkit Detection Technology
The use of rootkits for malicious purposes such as botnets has increased exponentially in 2006. This prototype demonstrates technology capable of detecting advanced kernel rootkits by performing runtime memory verification of known kernel software and correlation with CPU state from an isolated secure platform partition.

 
 
Building the Mobile Tomorrow
 
Identity-Capable Platforms: A Telco Use Case
With myriad online accounts it is problematic for users to remember login credentials for each site, which often leads to insecure credentials management. This demonstration shows how a service provider can securely provision a SoftSIM identity into an Intel Identity-Capable Platform and then use it to connect to a wireless network. This cost-saving client capability was jointly developed by Intel, British Telecommunications, and Hewlett Packard using Liberty Alliance Project standard protocols.

Dynamically Composable Computing
The user interface of a small form-factor mobile device results in a poor user experience in some computing scenarios. DCC research explores how to compose a more effective computing environment from wireless resources found in the locality. A prototype composition manager middleware application enables creation of a logical computing platform on the fly, and uses a high-bandwidth UWB radio to connect the component parts.

Flexible Front End Module for Multi-radio Devices
As the number of wireless standards increases, users are demanding ever smaller, yet highly connected and cost-effective devices. The flexible front end module is a Gallium Arsenide FEM architecture that supports WiFi frequencies 2.4 GHz and 5 GHz and WiMAX frequency 3.5 GHz on a single chip, thus helping manufacturers to reduce size and cost while delivering greater capability.

Reconfigurable Antennas for Multi-standards Support
As wireless standards increase with the end user's desire to always be connected, the number of antennas in mobile platforms will need to dramatically increase. This requirement introduces challenges to form factor space and cost. The Intel mobile concept PC demonstrates Intel's research into reducing antenna count via reconfigurable antenna and mixed network software for seamless switching between 3G, WiFi, and WiMAX standards.

MAC Coordination for Multi-radio Coexistence
As users demand devices that support multiple wireless standards, coordination of multiple radios is critical for simultaneous operation. Intel's MAC coordination research demonstrates coexistence between multiple standards for next-generation mobile devices. The solution highlights dynamically scheduled shared RF spectrum and hardware resources (antenna, FEM, etc.) to enable desired usage models. In this demo, the concurrent connectivity to both WiFi and WiMAX networks is demonstrated.

Context-aware Instant Messaging
Instant messaging has become a regular communication method for tens of millions of people. With avatars, personalization features, and the immediacy of communication, IM is a near-proxy for many people. Intel's researchers show in this demo how an individual's context (conversation, activity, and application states) can be sensed, inferred, and communicated with a user's contacts automatically in mobile situations.

UbiFit Garden: Exploring On-body Sensing and Personal Displays to Encourage Physical Activity
Computing devices with embedded sensing that are capable of inferring a range of human activities will soon be small and inexpensive enough to be worn throughout everyday life. To explore opportunities and challenges of using such a device, we present a prototype system combining mobile activity sensing with a virtual garden on an individual's mobile phone to encourage personal reflection and gently persuade participation in regular physical activity.

Pedestrian Navigation on Mobile Devices
Portable navigation devices designed for vehicles suffer a usability crisis in the hands of pedestrians. Aligning the displayed map with the real world can be frustrating. Fortunately, inertial sensors built into the device can help overcome this alignment challenge. 3-D accelerometers, gyros, and magnetometers sense gravity, rotation, and the Earth's magnetic field to resolve the device's pose, allowing digital maps like Google Earth* to stay oriented to the device's true heading.

Power-Efficient Reconfigurable Baseband Processor
As wireless standards continue to emerge, the traditional ASIC approach to baseband processing is limited in flexibility and die-size usage efficiency for multiple standards. Intel researchers have prototyped a reconfigurable baseband processor (part of the scalable communication core) and development kit that promises to reduce size and increase flexibility for baseband processors running multiple standards.

Mobile Internet Devices
Mobile devices constantly evolve while form factors continue to shrink and performance and connectivity increase. In this demo you will see some of the new and innovative ultra-mobile form factors and UIs available in 2008. We will showcase Glide, a very unique push-button interface to share all of your media as well as get some work done. We will be running Red Flag's Linux* on the devices.

Peer-to-peer Mobile Collaboration
While the recent development of WiFi ad hoc and mesh networking technologies have made mobile collaboration among a small group of people possible anywhere anytime, peer-to-peer technologies have become the foundation for server-free communications. In this demo, we will show mobile collaboration applications based on peer-to-peer technologies, including voice, IM, desktop/application sharing, e-mail, and whiteboard sharing.

Establishing an OverMesh Network with the Intel-powered classmate PC
Practical wireless mesh networks are moving towards mainstream industry deployment. As wireless mesh networks become more ubiquitous, how to enable distributed applications and services is a challenging research topic. This demo will demonstrate OverMesh, a client-based computing and communications platform that will showcase infrastructure-less information technology on Intel's classmate PC to include ad hoc wireless connections and mobile collaboration applications.

 
 
People-Centered Innovation
 
Women and Technology: Options and Growth for the Next 50 Percent
This study explores gender and technology relations by focusing on female usage of technologies, constraints to access for women, and female entrepreneurship for shared usage Information and Communication Technologies (ICT) projects such as telecenters. It examines cases of ICT shared use projects in India and Chile to explore similarities and differences in particular social and economic contexts.

Getting to Know the Users Generating UGC
DHG's User Experience Group conducts ethnographic research exploring the ways people capture, create, manipulate, and share digital media such as video clips, photos, and music. Here we present profiles of "lead users" of user-generated content services whose motivations are closely considered as DHG designs next-generation home computing devices.

Networking and Gardening: Metaphors, Idioms, and Strategies for Digital Housekeeping
This poster introduces a multi-country ethnographic study that analyzes the experience of setup, care, and maintenance of technologies in homes. Preliminary results suggest that home technology care and troubleshooting is often understood through metaphors and idioms. By understanding these metaphors and idioms, Intel can drive meaningful people-centered solutions.

Personal Digital Money
Despite its increasing complexity, intangibility, and virtualization, individuals want money to be personal: personally understandable, expressive, and controllable. A two-year exploration is using ethnography and design to re-imagine how we could interact with digital money.

Mobile Times: Can Technologies Deliver More Than Busyness
The Mobile Times program seeks to identify the temporal dimensions of everyday life and to understand how time can shape mobile technology innovation. We are applying anthropological insight to quantitative pattern recognition to develop mathematical models of time. This research and the resulting models will provide a new basis for our understanding of mobility and the kinds of devices that make temporal sense to people. External advisors include senior faculty from UC Irvine, Bryant University, and Goldsmiths College, University of London.

Islamic Charitable Institutions and Community-based Technology: Towards E-Madrasas in Morocco
Islamic charitable institutions are ripe with assets and resources. This year-long research initiative has looked at how these assets and resources might be tapped, in the case of Morocco, for the purposes of technology deployments in local communities. We have looked specifically at Quranic schools, or madrasas, to map the flow of resources into the schools in order to seek out appropriate points of intervention that support the interests and goals of the schools and local communities. Our research team has worked in connection with government officials in Morocco to begin to identify appropriate local deployments. This program has been led by visiting faculty from Iowa State University.

 
 
Silicon Leadership
 
Computational Lithography: Technology That Makes Technology Affordable
Lithography tools and materials limits defined the density-scaling pace for all of the 20th century. At the turn of the millennium, IC features became quite a bit smaller than the wavelength of the light used to form them, and with that, new computationally intense methods such as OPC and DFM became integral parts of lithography. Technology leadership in the 21st century will require even more powerful computational lithography methods to provide for best density and shortest time to market at highest yields and lowest cost. Come see the demo that showcases results of computational litho research at Intel.

The Future of Semiconductor Scaling
During the 90s, dimension scaling coupled with voltage scaling was sufficient to deliver improvements on density, performance, and power simultaneously. In the next ten years, new materials and device architectures are needed to keep all three going. Strained Si, high-k/metal gate, and trigate can all be combined to deliver much higher performance-to-power. Looking beyond trigate, high-mobility materials show promise to allow equivalent performance at much lower power if key issues can be solved. Intel continuously evaluates novel devices and ultimate scaling to understand how far they can be extended. No other company looks as far out and as completely.

 
 
Tera-scale Computing
 
Safer Software Execution Through Log-based Architectures
Lifeguards, software tools that proactively monitor programs for potential problems, can improve the reliability of end-user systems by catching software errors at runtime. Collaboratively, Intel and Carnegie Mellon University are exploring log-based architectures, new hardware enhancements designed to improve lifeguard performance on multi-core processors. We demonstrate an example of an enhanced lifeguard detecting a computer virus attack.

Building Tera-scale Apps with Ct
Ct, an advanced data parallel programming environment, extends C for throughput computing to maximize programmability and performance of several applications on present and future multi-core platforms. Demonstrations will compare conventional parallel programming and Ct, specifically for image processing and game physics applications.

Making Legacy Code Safe and Scalable
Most legacy software was not designed for multi-core architectures, limiting their performance relative to newer apps designed with parallelism in mind. Intel and UC Berkeley are researching ways to retrofit modern safety and concurrency features into the C programming language, allowing software developers to more easily evolve legacy C software to benefit from future tera-scale platforms.

Personal Multimedia Enhancement and Management
In order to better organize and improve both commercial and user-generated content, Intel is researching model-based multimedia applications to allow future PCs to comprehend and manipulate pictures and videos in real time. Examples include: sports highlight detection for smart video browsing, automated personal video authoring and sharing, and quality enhancement for user-generated video.

Interactive Ray Tracing
The ultimate goal for computer-generated graphics is to create photorealistic imagery generated on the fly. Ray tracing models the behavior of light to create shadows and reflections much better and more easily than the techniques used to render interactive 3-D graphics today. Our researchers show that the time is nearing when tera-scale computing will finally make real-time ray tracing possible.

3-D Teaming in Virtual Worlds
Intel researchers, in partnership with Qwaq and the Croquet Consortium, are developing model-based, 3-D virtual environments to improve teamwork and personal productivity. Example usages include IT operations, factory automation, medical diagnostics, petroleum industry simulations, and education. Future Tera-scale platforms will help bring life-like realism to these virtual worlds with higher-quality simulations and photorealistic graphics on the client.

80-core Teraflops Research Processor
Intel's 80-core Teraflops Research Processor represents an important milestone towards enabling future processors with tens to hundreds of cores. It is the first programmable chip to deliver more than one teraflop of performance—while consuming very little power. This prototype focuses on exploring scalable, energy-efficient designs for future multi-core chips as well as core-to-core interconnect and clocking.

Tera-scale FPGA Prototyping
This system enables fast, accurate emulation of future tera-scale architectures. Based on FPGA technology, various designs can be prototyped with short turnaround times. A rich set of debug features supports analyzing platform performance vs. other designs. The emulator strikes a perfect balance between simulators that cannot run an OS and silicon prototypes which are costly and slow to manufacture.

A CPU Talks to an FPGA Using the Front Side Bus
The FSB-FPGA Accelerator Platform is one of the key programs under the Intel® QuickAssist Technology initiative launched at IDF Beijing. Reliable data transfer between an FPGA module plugged into an Intel® Xeon® microprocessor socket is shown over front side bus in a Harwich platform server. The effort is an important step towards the future heterogeneous integration of accelerators directly alongside IA cores.

Accelerator Exoskeleton: IA Look-n-feel for Heterogeneous Cores
To maximize performance and power efficiency, future multi-core architectures may be heterogeneous, incorporating some accelerator cores alongside the IA cores. Accelerator Exoskeleton provides a shared memory multithreading programming paradigm for these accelerators using novel IA architectural extensions and software tool chains with an IA look-n-feel. We introduce these extensions and the programming environment—including compiler, debugger, and performance-analysis tools.

Optimizing Execution: A Co-designed Virtual Machine
We introduce a novel virtual machine tightly designed with the hardware underneath. The VM's main purpose is to dynamically adapt/tune running software to take better advantage of the underlying hardware. Code is dynamically optimized at the micro-op level using run-time information with little overhead. Advantages include increased parallelism, better cache hits, and better use of heterogeneous hardware resources.

Energy and Thermal Management for Tera-scale Platforms
We present methods to reduce energy consumption and control temperature in future multi-core platforms. A technique called "meeting point" dynamically evaluates parallel applications and reduces the voltage/frequency of non-critical threads, saving energy with minimal impact on performance. In addition, we manage thermal hot-spots with a combination of thread migration, core throttling and dynamic voltage/frequency scaling.

Simplifying Multi-threading and Boosting Performance
Intel researchers are developing hardware and software techniques to improve multi-threading. Speculative Parallel Threading looks for new multi-threading opportunities both statically and on-the-fly as code executes, going beyond conventional parallelization approaches. Transactional Memory automatically manages how multiple threads access shared memory to avoid errors and improve scalability. We present advances in both areas and demonstrate their effectiveness to parallelize code which is not amenable to traditional techniques.

 

 
Back to Top