Researcher Name:  Wei Liu

Title:  Research Scientist

Email:  wei.w.liu@intel.com

Location:  Santa Clara, CA

Lab:  Microprocessor Technology Labs / Programming Systems Lab

Primary Research Area:  Microarchitecture, compiler and language support for multi-core.

Bio:

Wei Liu is a research scientist in Microprocessor Technology Labs / Programming Systems Lab at Intel Corporation. He received his B.S. and Ph.D. in computer science from Tsinghua University, China, in 1997 and 2001 respectively. Before he joined Intel, he was a research scientist in the Department of Computer Science at University of Illinois at Urbana Champaign working with Professor Josep Torrellas.

Publications:

• Cheng Wang, Youfeng Wu, Edson Borin, Shiliang Hu, Wei Liu, Tin-fook Ngai and Jesse Fang, “New Slicing Algorithms for Parallelizing Single-Threaded Programs”, Workshop on Parallel Execution of Sequential Programs on Multi-core Architectures (PESPMA), Jun 2008
• James Tuck, Wei Liu, and Josep Torrellas, “CAP: Criticality Analysis for Power-Ecient Speculative Multi-threading”, XXV IEEE International Conference on Computer Design (ICCD), Oct 2007
• Todd Anderson, Neal Glew, Peng Guo, Brian Lewis, Wei Liu, Zhanglin Liu, Leaf Petersen, Mohan Rajagopalan, James Stichnoth, Gansha Wu and Dan Zhang, “Pillar: A Parallel Implementation Language”, The 20th International Workshop on Languages and Compilers for Parallel Computing (LCPC), Oct 2007
• Pablo Montesinos, Wei Liu, and Josep Torrellas, “Using Register Lifetime Predictions to Protect Register Files Against Soft Errors”, The 37th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN), Jun 2007
• Shan Lu, Pin Zhou, Wei Liu, Yuanyuan Zhou and Josep Torrellas, “PathExpander: Architectural Support for Increasing the Path Coverage of Dynamic Bug Detection”, The 39th Annual IEEE/ACM International Symposium on Micro-architecture (MICRO-39), Dec 2006
• Pablo Montesinos, Wei Liu, and Josep Torrellas, “Shield: Cost-Effective Soft-Error Protection for Register Files”, The 3rd IBM P=ac2 Conference, Oct 2006
• Wei Liu, James Tuck, Luis Ceze, Karin Strauss, Jose Renau and Josep Torrellas, “POSH: A TLS Compiler that Exploits Program Structure”, ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP), Mar 2006.
• Jose Renau, Karin Strauss, Luis Ceze, Wei Liu, Smruti Sarangi, James Tuck and Josep Torrellas, “Energy-Ecient Thread-Level Speculation on a CMP”, IEEE Micro Special Issue: Micro's Top Picks from Computer Architecture Conferences, Jan-Feb 2006.
• Smruti Sarangi, Wei Liu (equal contribution), Josep Torrellas and Yuanyuan Zhou, “ReSlice: Selective Re-Execution of Long-Retired Misspeculated Instructions Using Forward Slicing”, 38th Annual IEEE/ACM International Symposium on Micro-architecture (MICRO), Nov 2005.
• Wei Liu, James Tuck, Luis Ceze, Karin Strauss, Jose Renau and Josep Torrellas, “POSH: A Pro
  ler-Enhanced TLS Compiler that Leverages Program Structure”, The 2nd IBM P=ac2 Conference, Sep 2005.
• Jose Renau, James Tuck, Wei Liu, Luis Ceze, Karin Strauss, and Josep Torrellas, “Tasking with Out-of-Order Spawn in TLS Chip Multiprocessors: Microarchitecture and Compilation”, ACM International Conference on Supercomputing (ICS), June 2005.
• Jose Renau, Karin Strauss, Luis Ceze, Wei Liu, Smruti Sarangi, James Tuck, and Josep Torrellas, “Thread-Level Speculation on a CMP Can Be Energy Ecient”, ACM International Conference on Supercomputing (ICS), June 2005.
• Yuanyuan Zhou, Pin Zhou, Feng Qin, Wei Liu, and Josep Torrellas, “Efficient and Flexible Architectural Support for Dynamic Monitoring”, ACM Transactions on Architecture and Code Optimization (TACO), Volume 2 Issue 1, March 2005.
• Pin Zhou, Wei Liu, Long Fei, Shan Lu, Feng Qin, Yuanyuan Zhou, Sam Midki
  and Josep Torrellas, “AccMon: Automatically Detecting Memory-Related Bugs via Program Counter-based Invariants”, 37th Annual IEEE/ACM International Symposium on Micro-architecture (MICRO), Portland, USA, Dec 2004.
• Pin Zhou, Feng Qin, Wei Liu, Yuanyuan Zhou and Josep Torrellas, “iWatcher: Simple and General Architectural Support for Software Debugging”, IEEE Micro Special Issue: Micro's Top Picks from Computer Architecture Conferences, Nov-Dec 2004.
• Pin Zhou, Feng Qin, Wei Liu, Yuanyuan Zhou and Josep Torrellas, “iWatcher: Ecient Architectural Support for Software Debugging”, the 31st Annual International Symposium on Computer Architecture (ISCA), Munchen, Germany, Jun 19-23, 2004.
• Wei Liu, “Research on Scalable Cluster File Systems”, Ph.D. Thesis, May 2001.
• Wei Liu, Xinming Ou, Weimin Zheng, Min Wu and Meiming Shen, “Prefetching and Caching Metadata in a Distributed NFS Server”, the 4th International Conference on Algorithms and Architectures for Parallel Processing (ICA3PP2000), Hongkong, Dec 11-13, 2000, pp 490-495.
• Wei Liu, Weimin Zheng, Meiming Shen, Xinming Ou and Min Wu, “Design and Implementation of a Distributed NFS Server on Cluster of Workstations”, the 12th IASTED International Conference on Parallel and Distributed Computing and Systems (PDCS2000), Las Vegas, USA, Nov 6-9, 2000, pp 7-12.
• Wei Liu, Weimin Zheng, Meiming Shen, Min Wu and Xinming Ou, “Using a Cluster File System (TH-CluFS) to Construct a Scalable Cluster System of Web Server”, the 3rd International Asia-Paci
  c Web Conference (APWeb2000), Xi'an, China, Oct 27-31, 2000, pp 248-252.
• Wei Liu, Min Wu, Xinming Ou, Weimin Zheng and Meiming Shen, “Design of an I/O Balancing File System on Web Server Clusters”, In Proceeding of the 29th International Workshops on Parallel Processing (SWS), Toronto, Canada, Aug 21-24, 2000, pp 119-125.
• Wei Liu, Weimin Zheng, Meiming Shen, Xinming Ou and Min Wu, “An Effective File Migration Algorithm in Cluster File Systems", In Proceeding of the 29th International Workshops on Parallel Processing (HPSEA), Toronto, Canada , Aug 21-24, 2000, pp 329-335.
• Wei Liu, Xinming Ou, Min Wu, Weimin Zheng and Meiming Shen, “A Distributed Naming Mechanism in Scalable Cluster File System", the 4th International Conference on High Performance Computing in Asia-Pacfi
  c Region, Vol.I, Beijing, P.R.China, May 14-17, 2000, pp.37-41.
• Wei Liu,Weimin Zheng, Dingxing Wang and Meimin Shen, “Issues and Prospects of Distributed File Systems", Fifth International Conference for Young Computer Scientists(ICYCS'99), Nanjing, P.R.China, August 17-20, 1999, pp.757-759.
• Wei Liu, Weimin Zheng and Xiaowei Zheng, “The Concept of Node-oriented Speedup on SMP Cluster", Journal of Computer Engineering and Design, Vol.21 No.5, Oct 2000, pp.16-21 (in Chinese).
• Min Wu, Wei Liu, Xinming Ou, Weimin Zheng and Meiming Shen, “Researching of Unique Caching System in Cluster File System”, the 11th National Conference of Information Storage, Beijing, China, 2000 (in Chinese).
• Wei Liu, Weimin Zheng, Jun Shen and Dapeng Ju, “Design and Implementation of Memory Map Mechanism in Underlying Communication", Journal of Software, Vol.10, No.1, Jan 1999, pp.24-28 (in Chinese).
• Wei Liu and Weimin Zheng, “The Concept of Node-oriented Speedup Model based on SMP Cluster”, the 5th Graduate Seminar on Computer Science and Technology, Weihai, China, Jul 1998, pp.94-100 (in Chinese).

Professional activities:

• Co-Chair. Workshop on Parallel Execution of Sequential Programs on Multi-core Architectures (PESPMA), 2008, 2009.
• Tutorial and Workshop Chair. IEEE International Conference on Workload Charactorization (IISWC), 2007.
• Finance and Publications Chair, Session Chair. ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP), 2006.
• Finance Chair. International Conference on Parallel Architecture and Compilation Techniques (PACT), 2005.
• Web Chair. 11th International Symposium on High-Performance Computer Architecture (HPCA), 2005.
• Webmaster. International Symposium on High Performance Computer Architecture (HPCA) Repository (http://www.hpcaconf.org).
• Reviewer for: PACT'08, PLDI'08, CGO'08, HPCA'08, IISWC'07, LCTES'07, MICRO'06, DSN'06, PPoPP'05, MICRO'04, ICS'02, Journal of Systems and Software, Journal of Computer Research and Development (in Chinese), Acta Electronica Sinica (Journal of China Institute of Electronics) (in Chinese)